JEE Main 2026 (Online) 2nd April Morning Shift | Semiconductor Question 11 | Physics

For the given circuit (shown in part (A)) the time dependent input voltage $v_{in}(t)$ and corresponding output $v_{o}(t)$ are shown in part (B) and part (C), respectively. Identify the components that are used in the circuit between points X and Y.

JEE Main 2026 (Online) 2nd April Morning Shift Physics - Semiconductor Question 11 English 1

JEE Main 2026 (Online) 2nd April Morning Shift Physics - Semiconductor Question 11 English 2

JEE Main 2026 (Online) 2nd April Morning Shift Physics - Semiconductor Question 11 English Option 1

JEE Main 2026 (Online) 2nd April Morning Shift Physics - Semiconductor Question 11 English Option 2

JEE Main 2026 (Online) 2nd April Morning Shift Physics - Semiconductor Question 11 English Option 3

JEE Main 2026 (Online) 2nd April Morning Shift Physics - Semiconductor Question 11 English Option 4

JEE Main 2026 (Online) 28th January Evening Shift

MCQ (Single Correct Answer)

-1

Two p-n junction diodes $D_1$ and $D_2$ are connected as shown in figure. $A$ and $B$ are input signals and $C$ is the output. The given circuit will function as a ________.

JEE Main 2026 (Online) 28th January Evening Shift Physics - Semiconductor Question 20 English

AND Gate

OR Gate

NOR Gate

NAND Gate

JEE Main 2026 (Online) 28th January Morning Shift

MCQ (Single Correct Answer)

-1

Assuming in forward bias condition there is a voltage drop of 0.7 V across a silicon diode, the current through diode $D_1$ in the circuit is $\_\_\_\_$ mA .

(Assume all diodes in the given circuit are identical)

JEE Main 2026 (Online) 28th January Morning Shift Physics - Semiconductor Question 19 English

17.6

18.8

20.15

11.7

JEE Main 2026 (Online) 24th January Evening Shift

MCQ (Single Correct Answer)

-1

$$ \text { Identify the correct truth table of the given logic circuit. } $$

JEE Main 2026 (Online) 24th January Evening Shift Physics - Semiconductor Question 12 English

$$ \begin{array}{|c|c|c|} \hline \text { A } & \text { B } & \text { Y } \\ \hline \hline 0 & 0 & 0 \\ \hline \hline 0 & 1 & 0 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 0 \\ \hline \end{array} $$

$$ \begin{array}{|c|c|c|} \hline \text { A } & \text { B } & \text { Y } \\ \hline \hline 0 & 0 & 0 \\ \hline \hline 0 & 1 & 1 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 0 \\ \hline \end{array} $$

$$ \begin{array}{|c|c|c|} \hline \text { A } & \text { B } & \text { Y } \\ \hline \hline 0 & 0 & 1 \\ \hline \hline 0 & 1 & 1 \\ \hline \hline 1 & 0 & 1 \\ \hline \hline 1 & 1 & 0 \\ \hline \end{array} $$

$$ \begin{array}{|c|c|c|} \hline \text { A } & \text { B } & \text { Y } \\ \hline \hline 0 & 0 & 1 \\ \hline \hline 0 & 1 & 0 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 0 \\ \hline \end{array} $$

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