A 0 to 6 counter consist of 3 flip-flops and a combination circuit of 2 input gate(s). The combination circuit consists of

Figure shows a mod-K counter, Here K is equal to

In a J_K flip-flop, we have J=$$\overline Q $$ and K=1 (see figure). Assuming the flip-flop was intially cleared and then clocked for 6 pulses, the sequence at the Q output will be

A switch-tail ring counter is made by using a single D flip-flop. The resulting circuit is a