1
GATE ECE 2003
MCQ (Single Correct Answer)
+1
-0.3
A 0 to 6 counter consist of 3 flip-flops and a combination circuit of 2 input gate(s). The combination circuit consists of
2
GATE ECE 1998
MCQ (Single Correct Answer)
+1
-0.3
Figure shows a mod-K counter, Here K is equal to
3
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
In a J_K flip-flop, we have J=$$\overline Q $$ and K=1 (see figure). Assuming the flip-flop was intially cleared and then clocked for 6 pulses, the sequence at the Q output will be
4
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
An R-S latch is
Questions Asked from Sequential Circuits (Marks 1)
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GATE ECE 2023 (1)
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GATE ECE 2017 Set 1 (2)
GATE ECE 2016 Set 2 (1)
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GATE ECE 2015 Set 3 (1)
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GATE ECE 2010 (1)
GATE ECE 2005 (2)
GATE ECE 2004 (2)
GATE ECE 2003 (1)
GATE ECE 1998 (1)
GATE ECE 1997 (1)
GATE ECE 1995 (2)
GATE ECE 1994 (1)
GATE ECE 1993 (1)
GATE ECE 1992 (1)
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GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics