1
GATE ECE 2003
MCQ (Single Correct Answer)
+1
-0.3
A 0 to 6 counter consist of 3 flip-flops and a combination circuit of 2 input gate(s). The combination circuit consists of
2
GATE ECE 1998
MCQ (Single Correct Answer)
+1
-0.3
Figure shows a mod-K counter, Here K is equal to
3
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
In a J_K flip-flop, we have J=$$\overline Q $$ and K=1 (see figure). Assuming the flip-flop was intially cleared and then clocked for 6 pulses, the sequence at the Q output will be
4
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
An R-S latch is
Questions Asked from Sequential Circuits (Marks 1)
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GATE ECE 2023 (1)
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GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude