1
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
A switch-tail ring counter is made by using a single D flip-flop. The resulting circuit is a
A
SR flip-flop
B
JK flip-flop
C
D flip-flop
D
T flip-flop
2
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
An R-S latch is
A
Combinational circuit
B
Synchronous sequential circuit.
C
One bit memory element
D
One clock delay element.
3
GATE ECE 1994
Fill in the Blanks
+1
-0
Synchronous counters are _____ than the ripple counters.
4
GATE ECE 1993
Numerical
+1
-0
A pulse train with a frequency of 1 MHz is counted using a modulo-1024 ripple-counter built with J-K flip flops. For proper operation of the counter, the maximum permissible propagation delay per flip flop stage is ______ n sec.
Your input ____
GATE ECE Subjects
EXAM MAP
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
CBSE
Class 12