Choose the correct one from among the alternatives A, B, C, D after matching an item from Group 1 with the most appropriate item in Group 2.

Group1
P. shift register
Q. Counter
R. Decoder

Group2
1. Frequency division
2. Addressing in memory chips
3. Serial to parallel data conversion

A 0 to 6 counter consist of 3 flip-flops and a combination circuit of 2 input gate(s). The combination circuit consists of

Figure shows a mod-K counter, Here K is equal to

In a J_K flip-flop, we have J=$$\overline Q $$ and K=1 (see figure). Assuming the flip-flop was intially cleared and then clocked for 6 pulses, the sequence at the Q output will be