GATE ECE
Analog Circuits
FET and MOSFET
Previous Years Questions

Marks 1

Consider the CMOS circuit shown in the figure (substrates are connected to their respective sources). The gate width (W) to gate length (L) ratios $$\...
The ideal long channel nMOSFET and pMOSFET devices shown in the circuits have threshold voltages of 1 V and $$-$$1 V, respectively. The MOSFET substra...
Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10 $$\mu$$m and width 100 $$\mu$$m. The product of electron mobility ($$\mu...
Consider the circuit shown with an ideal long channel nMOSFET (enhancement mode, substrate is connected to the source). The transistor is appropriatel...
In the MOSFET amplifier of the figure the signal output V1 and V2 obey the relationship ...
An n-channel JFET has IDSS = 1 mA and Vp = -5 V. Its maximum transconductance is ______
The transit time of a current carriers through the channel of an FET decides its ____________characteristics.

Marks 2

The ac schematic of an NMOS common-source stage is shown in the figure below, where part of the biasing circuits has been omitted for simplicity. For ...
An n-channel depletion MOSFET has following two points on its ID - VGS curve: (i)VGS = 0 at Id = 12 mA and (ii)VGS = -6 Volts at Zo =$$\infty $$ W...
Given $${r_d} = 20K\Omega ,\,\,{I_{DSS}}\, = \,10mA,\,\,{V_P} = - 8V$$ Zi and Zo of the circuit are respectively ...
Given $${r_d} = 20K\Omega ,\,\,{I_{DSS}}\, = \,10mA,\,\,{V_P} = - 8V$$ Transconductance in milli-Siemens (mS) and voltage gain of the amplifier a...
Given $${r_d} = 20K\Omega ,\,\,{I_{DSS}}\, = \,10mA,\,\,{V_P} = - 8V$$ ID and VDS under DC conditions are respectively ...
For an n-channel MOSFET and its transfer curve shown in the figure, the threshold voltage is ...
The action of a JFET in its equivalent circuit can be best represented as a
Consider the following statements in connection with the CMOS inverter in the Figure. Where both the MOSFETS are of enhancement type and both have a t...
An n-channel JFET has a pinch-off voltage of Vp = -5V. VDS(max) = 20V and gm = 2mA/V. The minimum 'ON' resistance is achieved in the JFET for ...
The JFET in the circuit shown in fig. has an IDSS = 10mA and Vp = -5V. The value of the resistance Rs for a drain current IDS = 6.4mA is (select the N...

Marks 5

A JEFT with VP = -4V and IDss = 12mA is used in the circuit shown in Fig. Assuming the device to be operating in saturation, determine ID, VDS and ...
In the JFET circuit shown in Fig assume that R1||R2 = 1 M$$\Omega $$ and the total stray capacitance at the output to be 20 pF. The JFET used has ...
In the MOSFET amplifier shown in the fig. below, the transistor has $$\mu \,\, = \,\,50,\,\,{r_d}\,\, = \,\,10\,K\Omega ,\,\,{C_{gs}}\,\, = \,\,5\,\,p...

Marks 8

(a) Specify the type of the negative feedback in the JFET amplifier shown in Fig. (b)Calculate the voltage gain (V0/Vi), of the amplifier with no fee...
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