FET and MOSFET · Analog Circuits · GATE ECE

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Marks 1

GATE ECE 2024
In the circuit below, assume that the long channel NMOS transistor is biased in saturation. The small signal trans-conductance of the transistor is $g...
GATE ECE 2022
Consider the CMOS circuit shown in the figure (substrates are connected to their respective sources). The gate width (W) to gate length (L) ratios $$\...
GATE ECE 2022
The ideal long channel nMOSFET and pMOSFET devices shown in the circuits have threshold voltages of 1 V and $$-$$1 V, respectively. The MOSFET substra...
GATE ECE 2022
Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10 $$\mu$$m and width 100 $$\mu$$m. The product of electron mobility ($$\mu...
GATE ECE 2022
Consider the circuit shown with an ideal long channel nMOSFET (enhancement mode, substrate is connected to the source). The transistor is appropriatel...
GATE ECE 1998
In the MOSFET amplifier of the figure the signal output V1 and V2 obey the relationship ...
GATE ECE 1995
An n-channel JFET has IDSS = 1 mA and Vp = -5 V. Its maximum transconductance is ______
GATE ECE 1994
The transit time of a current carriers through the channel of an FET decides its ____________characteristics.

Marks 2

GATE ECE 2024
In the circuit shown below, the transistors $M_1$ and $M_2$ are biased in saturation. Their small signal transconductances are $g_{m1}$ and $g_{m2}$ r...
GATE ECE 2024
An NMOS transistor operating in the linear region has $I_{D}$ of 5 $\mu$A at $V_{DS}$ of 0.1 V. Keeping $V_{GS}$ constant, the $V_{DS}$ is increased t...
GATE ECE 2013
The ac schematic of an NMOS common-source stage is shown in the figure below, where part of the biasing circuits has been omitted for simplicity. For ...
GATE ECE 2006
An n-channel depletion MOSFET has following two points on its ID - VGS curve: (i)VGS = 0 at Id = 12 mA and (ii)VGS = -6 Volts at Zo =$$\infty $$ W...
GATE ECE 2005
Given $${r_d} = 20K\Omega ,\,\,{I_{DSS}}\, = \,10mA,\,\,{V_P} = - 8V$$ Zi and Zo of the circuit are respectively ...
GATE ECE 2005
Given $${r_d} = 20K\Omega ,\,\,{I_{DSS}}\, = \,10mA,\,\,{V_P} = - 8V$$ Transconductance in milli-Siemens (mS) and voltage gain of the amplifier a...
GATE ECE 2005
Given $${r_d} = 20K\Omega ,\,\,{I_{DSS}}\, = \,10mA,\,\,{V_P} = - 8V$$ ID and VDS under DC conditions are respectively ...
GATE ECE 2005
For an n-channel MOSFET and its transfer curve shown in the figure, the threshold voltage is ...
GATE ECE 2003
The action of a JFET in its equivalent circuit can be best represented as a
GATE ECE 2002
Consider the following statements in connection with the CMOS inverter in the Figure. Where both the MOSFETS are of enhancement type and both have a t...
GATE ECE 1992
An n-channel JFET has a pinch-off voltage of Vp = -5V. VDS(max) = 20V and gm = 2mA/V. The minimum 'ON' resistance is achieved in the JFET for ...
GATE ECE 1992
The JFET in the circuit shown in fig. has an IDSS = 10mA and Vp = -5V. The value of the resistance Rs for a drain current IDS = 6.4mA is (select the N...

Marks 5

GATE ECE 1996
A JEFT with VP = -4V and IDss = 12mA is used in the circuit shown in Fig. Assuming the device to be operating in saturation, determine ID, VDS and ...
GATE ECE 1995
In the JFET circuit shown in Fig assume that R1||R2 = 1 M$$\Omega $$ and the total stray capacitance at the output to be 20 pF. The JFET used has ...
GATE ECE 1994
In the MOSFET amplifier shown in the fig. below, the transistor has $$\mu \,\, = \,\,50,\,\,{r_d}\,\, = \,\,10\,K\Omega ,\,\,{C_{gs}}\,\, = \,\,5\,\,p...

Marks 8

GATE ECE 1987
(a) Specify the type of the negative feedback in the JFET amplifier shown in Fig. (b)Calculate the voltage gain (V0/Vi), of the amplifier with no fee...
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