1
GATE ECE 2015 Set 3
MCQ (Single Correct Answer)
+1
-0.3
The circuit shown consists of J-K flip-flops, each with an active low asynchronous reset ($$\overline {{R_d}} $$ input).
The counter corresponding to this circuit is
2
GATE ECE 2015 Set 2
Numerical
+1
-0
A mod-n counter using a synchronous binary up-counter with synchronous clear input is shown in the figure. The value of n is _______.
Your input ____
3
GATE ECE 2014 Set 1
Numerical
+1
-0
Five JK flip - flops are cascaded to form circuit shown in figure. Clock pulses at a frequency of 1 MHz are applied as shown. The frequency (in kHz) of the waveform at Q3 is ______.
Your input ____
4
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+1
-0.3
The circuit shown in the figure is a
GATE ECE Subjects
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General Aptitude
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Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Fourier Transform Representation of Continuous Time Signal Fourier Series Transmission of Signal Through Continuous Time LTI Systems Miscellaneous Sampling Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Discrete Time Signal Z Transform Transmission of Signal Through Discrete Time Lti Systems
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