1
GATE ECE 2025
MCQ (Single Correct Answer)
+1
-0.33
A 3-input majority logic gate has inputs $X, Y$ and $Z$. The output $F$ of the gate is logic ' 1 ' if two or more of the inputs are logic ' 1 '. The output $F$ is logic ' 0 ' if two or more of the inputs are logic '0'. Which one of the following options is a Boolean expression of the output $F$ ?
A
$X Y+Y Z+Z X$
B
$X \oplus Y \oplus Z$
C
$X+Y+Z$
D
$X Y Z$
2
GATE ECE 2023
Numerical
+1
-0

For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is __________ (rounded off to the nearest integer).

GATE ECE 2023 Digital Circuits - Logic Gates Question 2 English

Your input ____
3
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of 2-input NAND gates required to implement a 2-input XOR gate is
A
4
B
5
C
6
D
7
4
GATE ECE 2016 Set 1
MCQ (Single Correct Answer)
+1
-0.3
The output of the combinational circuit given below is GATE ECE 2016 Set 1 Digital Circuits - Logic Gates Question 20 English
A
A+B+C
B
A(B+C)
C
B(C+A)
D
C(A+B)
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