Assuming that all flip-flops are in reset condition initially, the count sequence observed at Q_A in the circuit shown is

The present output Q_n of an edge triggered JK flip-flop is logic 0. If J=1, then Q_n+1

The given figure shows a ripple counter using positive edge triggered flip-flops. If the present state of counter is Q₂ Q₁ Q₀ = 011, then its next state ( Q₂ Q₁ Q₀ ) will be

Choose the correct one from among the alternatives A, B, C, D after matching an item from Group 1 with the most appropriate item in Group 2.

Group1
P. shift register
Q. Counter
R. Decoder

Group2
1. Frequency division
2. Addressing in memory chips
3. Serial to parallel data conversion