1
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
An R-S latch is
2
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
A switch-tail ring counter is made by using a single D flip-flop. The resulting circuit is a
3
GATE ECE 1994
Fill in the Blanks
+1
-0
Synchronous counters are _____ than the ripple counters.
4
GATE ECE 1993
Numerical
+1
-0
A pulse train with a frequency of 1 MHz is counted using a modulo-1024 ripple-counter built with J-K flip flops. For proper operation of the counter, the maximum permissible propagation delay per flip flop stage is ______ n sec.
Your input ____
Questions Asked from Sequential Circuits (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE 2023 (1)
GATE ECE 2018 (1)
GATE ECE 2017 Set 1 (2)
GATE ECE 2016 Set 2 (1)
GATE ECE 2015 Set 2 (1)
GATE ECE 2015 Set 3 (1)
GATE ECE 2014 Set 3 (2)
GATE ECE 2014 Set 1 (1)
GATE ECE 2012 (1)
GATE ECE 2011 (1)
GATE ECE 2010 (1)
GATE ECE 2005 (2)
GATE ECE 2004 (2)
GATE ECE 2003 (1)
GATE ECE 1998 (1)
GATE ECE 1997 (1)
GATE ECE 1995 (2)
GATE ECE 1994 (1)
GATE ECE 1993 (1)
GATE ECE 1992 (1)
GATE ECE 1991 (1)
GATE ECE 1990 (1)
GATE ECE 1988 (1)
GATE ECE 1987 (2)
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude