GATE ECE
Digital Circuits
Semiconductor Memories
Previous Years Questions

## Marks 1

In a DRAM,
A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimu...
Each cell of a static Random Access Memory Contains
The minimum number of MOS transistors required to make a dynamic RAM cell is
A PLA can be used
A dynamic RAM consists of
Choose the correct satatement(s) from the following:

## Marks 2

A 2 $$\times$$ 2 ROM array is built with the help of diodes as shown in the circuit below. Here W0 and W1 are signals that select the word lines and...
If WL is the Word Line and BL the Bit Line, an SRAM cell is shown in
In the circuit shown in Figure, A is a parallel in, parallel-out 4-bit register, which loads at the rising edge of the clock C. The input lines are c...
If the input X$$_3$$, X$$_2$$, X$$_1$$, X$$_0$$ to the ROM in figure 2.12 are 8-4-2-1 BCD numbers, then the outpus are Y$$_3$$,Y$$_2$$, Y$$_1$$, Y_...
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