ExamSIDE (Powered by ExamGOAL)
Questions
NEXT
1
GATE ECE 2022
MCQ (More than One Correct Answer)
+1
-0

Select the correct statement(s) regarding CMOS implementation of NOT gates.

A
Noise Margin High (NMH) is always equal to the Noise Margin Low (NML), irrespective of the sizing of transistors.
B
Dynamic power consumption during switching is zero.
C
For a logical high input under steady state, the nMOSFET is in the linear regime of operation.
D
Mobility of electrons never influences the switching speed of the NOT gate.
2
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+1
-0.3
The output (Y) of the circuit shown in the figure is GATE ECE 2014 Set 4 Digital Circuits - Logic Families Question 9 English
A
$$\overline A + \overline B + \overline C $$
B
$$A + \overline B \,\overline {.\,C} + A.\,\overline C $$
C
$$\overline A + B + \overline C $$
D
$$A.B.\overline C $$
3
GATE ECE 2009
MCQ (Single Correct Answer)
+1
-0.3
The full forms of the abbreviations TTL and COMS in reference to logic families are
A
Triple Transistor Logic and chip metal oxide semiconductor.
B
Tri-state Transistor Logic and chip metal oxide semiconductor.
C
Transistor Transistor Logic and chip metal oxide semiconductor.
D
Tri-state Transistor Transistor Logic and complementary metal oxide oxide silicon.
4
GATE ECE 2005
MCQ (Single Correct Answer)
+1
-0.3
Both transistors T1 and T2 in figure have a threshold voltage of 1 Volt. The device parameters $${K_1}$$ and $${K_2}$$ of $${T_1}$$ and $${T_2}$$ are, respectively, 36 µA/ $${V^2}$$ and and 9$$9\,A/{V^2}$$. The output voltage $${V_0}$$ IS GATE ECE 2005 Digital Circuits - Logic Families Question 10 English
A
1V
B
2V
C
3V
D
4V
NEXT
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
Network Elements Network Theorems Transient Response Sinusoidal Steady State Response Two Port Networks Network Graphs State Equations For Networks Miscellaneous
Control Systems
Basic of Control Systems Signal Flow Graph and Block Diagram Time Response Analysis Stability Root Locus Diagram Frequency Response Analysis Compensators State Space Analysis
Digital Circuits
Logic Gates Boolean Algebra Analog to Digital and Digital to Analog Converters Sequential Circuits Combinational Circuits Logic Families Number System and Code Convertions Semiconductor Memories
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Electronic Devices and VLSI
PN Junction Semiconductor Physics IC Basics and MOSFET BJT and FET
Analog Circuits
Diodes Bipolar Junction Transistor Frequency Response FET and MOSFET Oscillators Operational Amplifier Feedback Amplifier Power Amplifier 555 Timer
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Complex Variable Probability and Statistics Differential Equations Numerical Methods Transform Theory
Microprocessors
Instruction Set and Programming with 8085 Pin Details of 8085 and Interfacing with 8085
Communications
Analog Communication Systems Digital Communication Systems Random Signals and Noise Fundamentals of Information Theory Noise In Digital Communication
Electromagnetics
Maxwell Equations Transmission Lines Uniform Plane Waves Waveguides Antennas Miscellaneous
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEEAP EAPCETTS EAMCET
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12