1
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
In a J_K flip-flop, we have J=$$\overline Q $$ and K=1 (see figure). Assuming the flip-flop was intially cleared and then clocked for 6 pulses, the sequence at the Q output will be GATE ECE 1997 Digital Circuits - Sequential Circuits Question 61 English
A
010000
B
011001
C
010010
D
010101
2
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
A switch-tail ring counter is made by using a single D flip-flop. The resulting circuit is a
A
SR flip-flop
B
JK flip-flop
C
D flip-flop
D
T flip-flop
3
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
An R-S latch is
A
Combinational circuit
B
Synchronous sequential circuit.
C
One bit memory element
D
One clock delay element.
4
GATE ECE 1994
Fill in the Blanks
+1
-0
Synchronous counters are _____ than the ripple counters.
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