1
GATE ECE 2022
MCQ (More than One Correct Answer)
+1
-0.33

A state transition diagram with states A, B, and C, and transition probabilities p1, p2, ....., p7 is shown in the figure (e.g., p1 denotes the probability of transition from state A to B). For this state diagram, select the statements which is/are universally true.

GATE ECE 2022 Digital Circuits - Sequential Circuits Question 1 English

A
p2 + p3 = p5 + p6
B
p1 + p3 = p4 + p6
C
p1 + p4 + p7 = 1
D
p2 + p5 + p7 = 1
2
GATE ECE 2018
Numerical
+1
-0.33
A traffic signal cycles from GREEN to YELLOW, YELLOW to RED and RED to GREEN. In each cycle, GREEN is turned on for 70 seconds, YELLOW is turned on for 5 seconds and the RED is turned on for 75 seconds. This traffic light has to be implemented using a finite state machine (FSM). The only input to this FSM is a clock of 5 second period. The minimum number of flip-flops required to implement this FSM is _______.
Your input ____
3
GATE ECE 2017 Set 1
Numerical
+1
-0
Consider the D-Latch shown in the figure, which is transparent when its clock input CK is high and has zero propagation delay. In the figure, the clock signal CLK1 has a 50% duty cycle and CLK2 is a one-fifth period delayed version of CLK1. The duty cycle at the output latch in percentage is ___________. GATE ECE 2017 Set 1 Digital Circuits - Sequential Circuits Question 45 English 1 GATE ECE 2017 Set 1 Digital Circuits - Sequential Circuits Question 45 English 2
Your input ____
4
GATE ECE 2017 Set 1
MCQ (Single Correct Answer)
+1
-0.3
In the latch circuit shown, the NAND gates have non-zero, but unequal propagation delays. The present input condition is: P = Q = "0‟. If the input condition is changed simultaneously to P = Q = "1", the outputs X and Y are GATE ECE 2017 Set 1 Digital Circuits - Sequential Circuits Question 44 English
A
X = '1', Y = '1'
B
either X = '1', Y = '0' or X = '0', Y = '1'
C
either X = '1', Y = '1' or X = '0', Y = '0'
D
X = '0', Y = '0'
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