1
GATE ECE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
The outputs of the two flip-flops Q1, Q2 in the figure shown are initialized to 0, 0. The sequence generated at Q1 upon application of clock signal is GATE ECE 2014 Set 2 Digital Circuits - Sequential Circuits Question 28 English
A
01110
B
01010
C
00110
D
01100
2
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
The digital logic shown in the figure satisfies the given state diagram when Q1 is connected to input A of the XOR gate. GATE ECE 2014 Set 1 Digital Circuits - Sequential Circuits Question 30 English

Suppose the XOR gate is replaced by an XNOR gate. Which one of the following options preserves the state diagram?

A
Input A is connected to $${\overline Q _2}$$
B
Input A is connected to $${Q_2}$$
C
Input A is connected to $${\overline Q _1}$$ and S is complemented
D
Input A is connected to $${\overline Q _1}$$
3
GATE ECE 2012
MCQ (Single Correct Answer)
+2
-0.6
The state transition diagram for the logic circuit shown is GATE ECE 2012 Digital Circuits - Sequential Circuits Question 31 English
A
GATE ECE 2012 Digital Circuits - Sequential Circuits Question 31 English Option 1
B
GATE ECE 2012 Digital Circuits - Sequential Circuits Question 31 English Option 2
C
GATE ECE 2012 Digital Circuits - Sequential Circuits Question 31 English Option 3
D
GATE ECE 2012 Digital Circuits - Sequential Circuits Question 31 English Option 4
4
GATE ECE 2011
MCQ (Single Correct Answer)
+2
-0.6
The output of a 3-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output Vo is GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English
A
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 1
B
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 2
C
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 3
D
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 4
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