ExamSIDE (Powered by ExamGOAL)
Questions
PREVIOUS NEXT
1
GATE ECE 2004
MCQ (Single Correct Answer)
+2
-0.6
In the modulo-6 ripple counter shown in the figure, the output of the 2-input gate is used to clear the J-K flip-flops. The 2-input gate is GATE ECE 2004 Digital Circuits - Sequential Circuits Question 38 English
A
a NAND gate
B
a NOR gate
C
an OR gate
D
an AND gate
2
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
A 4 bit ripple counter and a 4 bit synchronous counter are made using flip-flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then
A
R = 10ns, S = 40ns
B
R = 40ns, S = 10ns
C
R = 10ns, S = 30ns
D
R = 30ns, S = 10ns
3
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
The digital block in the figure is realized using two positive edge triggered D flip-flops. Assume that for t < t0, Q1 = Q2 =0. The circuit in the digital block is given by

GATE ECE 2001 Digital Circuits - Sequential Circuits Question 40 English
A
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 40 English Option 1
B
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 40 English Option 2
C
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 40 English Option 3
D
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 40 English Option 4
4
GATE ECE 2000
MCQ (Single Correct Answer)
+2
-0.6
A sequential circuit using D flip-flop and logic gates is shown in the figure, where X and Y are the inputs and Z is the output. The circuit is GATE ECE 2000 Digital Circuits - Sequential Circuits Question 42 English
A
S–R Flip-Flop with inputs X = R and Y = S
B
S–R Flip-Flop with inputs X = S and Y = R
C
J–K Flip-Flop with inputs X = J and Y = K
D
J–K Flip-Flop with inputs X = K and Y = J
PREVIOUS NEXT
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous
Control Systems
Signal Flow Graph and Block Diagram Time Response Analysis Compensators Basic of Control Systems Frequency Response Analysis Stability Root Locus Diagram State Space Analysis
Digital Circuits
Logic Gates Boolean Algebra Analog to Digital and Digital to Analog Converters Sequential Circuits Combinational Circuits Logic Families Number System and Code Convertions Semiconductor Memories
General Aptitude
Numerical Ability Verbal Ability
Electronic Devices and VLSI
PN Junction Semiconductor Physics IC Basics and MOSFET BJT and FET
Analog Circuits
Bipolar Junction Transistor FET and MOSFET Oscillators Operational Amplifier 555 Timer Frequency Response Diodes Feedback Amplifier Power Amplifier
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Complex Variable Probability and Statistics Differential Equations Numerical Methods Transform Theory
Microprocessors
Pin Details of 8085 and Interfacing with 8085 Instruction Set and Programming with 8085
Communications
Analog Communication Systems Digital Communication Systems Random Signals and Noise Fundamentals of Information Theory Noise In Digital Communication
Electromagnetics
Maxwell Equations Transmission Lines Uniform Plane Waves Waveguides Antennas Miscellaneous
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEE
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
CBSE
Class 12