1
GATE ECE 2011
MCQ (Single Correct Answer)
+2
-0.6
The output of a 3-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output Vo is GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English
A
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 1
B
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 2
C
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 3
D
GATE ECE 2011 Digital Circuits - Sequential Circuits Question 32 English Option 4
2
GATE ECE 2009
MCQ (Single Correct Answer)
+2
-0.6
What are the counting states (Q1, Q2) for the counter shown in the figure below? GATE ECE 2009 Digital Circuits - Sequential Circuits Question 34 English
A
11, 10, 00, 11, 10,......
B
01,1011,00,01........,
C
00,11,01,10,00........
D
01,10,00,01,10........
3
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For each of the positive edge-triggered J-K flip flop used in the following future, the propagation delay is $$\Delta $$T GATE ECE 2008 Digital Circuits - Sequential Circuits Question 36 English

Which of the following waveforms correctly represents the output at Q1?

A
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 36 English Option 1
B
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 36 English Option 2
C
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 36 English Option 3
D
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 36 English Option 4
4
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
For the circuit shown, the counter state (Q1 Q0) follows the sequence GATE ECE 2007 Digital Circuits - Sequential Circuits Question 35 English
A
00,01,10,11,00......
B
00,01,10,00,01.......
C
00,01,11,00,01.....
D
00,10,11,00,10......
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