1

GATE ECE 2012

MCQ (Single Correct Answer)

+2

-0.6

In the three dimensional view of a silicon n-channel

**MOS**transistor shown below, $$\delta = 20$$ nm. The transistor is of width 1 $$\mu m$$. The depletion width formed at every p-n junction is 10 nm. The relative permittivities of Si and SiO_{2}, respectively, are 11.7 and 3.9, and $${\varepsilon _0}$$ = 8.9 $$ \times {10^{ - 12}}$$ F/m.The source-body junction capacitance is approximately

2

GATE ECE 2012

MCQ (Single Correct Answer)

+2

-0.6

In the

**CMOS**circuit shown, electron and hole mobilities are equal, and M_{1}and M_{2}are equally sized. The device M_{1}is in the linear region if3

GATE ECE 2009

MCQ (Single Correct Answer)

+2

-0.6

Consider the CMOS circuit shown, where the gate voltage of the n-MOSFET is increased
from zero, while the gate voltage of the p-MOSFET is kept constant at 3 V. Assume that, for
both transistors, the magnitude of the threshold voltage is 1 V and the product of the
transconductance parameter and the $$\left(\frac WL\right)$$ ratio, i.e. the quantity $$\mu C_{ox}\left(\frac WL\right)$$ , is 1 mAV

For small increase in V

^{-2}.For small increase in V

_{G}beyond 1 V, which of the following gives the correct description of the region of operation of each MOSFET?4

GATE ECE 2009

MCQ (Single Correct Answer)

+2

-0.6

Consider the CMOS circuit shown, where the gate voltage of the n-MOSFET is increased
from zero, while the gate voltage of the p-MOSFET is kept constant at 3 V. Assume that, for
both transistors, the magnitude of the threshold voltage is 1 V and the product of the
transconductance parameter and the $$\left(\frac WL\right)$$ ratio, i.e. the quantity $$\mu C_{ox}\left(\frac WL\right)$$ , is 1 mAV

Estimate the output voltage V

^{-2}.Estimate the output voltage V

_{0}for V_{G}=1.5 V. [Hints: Use the appropriate current-voltage equation for each MOSFET, based on the answer]Questions Asked from IC Basics and MOSFET (Marks 2)

Number in Brackets after Paper Indicates No. of Questions

GATE ECE 2017 Set 1 (1)
GATE ECE 2017 Set 2 (3)
GATE ECE 2016 Set 2 (2)
GATE ECE 2016 Set 3 (3)
GATE ECE 2016 Set 1 (1)
GATE ECE 2015 Set 2 (1)
GATE ECE 2015 Set 3 (2)
GATE ECE 2015 Set 1 (2)
GATE ECE 2014 Set 3 (3)
GATE ECE 2014 Set 2 (2)
GATE ECE 2014 Set 1 (1)
GATE ECE 2013 (1)
GATE ECE 2012 (4)
GATE ECE 2009 (2)
GATE ECE 2008 (3)
GATE ECE 2007 (1)
GATE ECE 2006 (1)
GATE ECE 2004 (1)
GATE ECE 2003 (3)

GATE ECE Subjects

Network Theory

Control Systems

Electronic Devices and VLSI

Analog Circuits

Digital Circuits

Microprocessors

Signals and Systems

Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform

Communications

Electromagnetics

General Aptitude