In the CMOS inverter circuit shown, if the transconductance parameters of the NMOS and PMOS transistors are
K_n = K_p = μ_nC_OX$$\frac{W_n}{L_n}$$ = μ_pC_OX$$\frac{W_P}{L_P}$$= 40 μA/V² and their threshold voltages are V_T = 1 V, the current I is:

An n-channel depletion MOSFET has following two points on its I_D − V_GS curve:
(i) V_GS = 0 at I_D = 12 mA and
(ii) V_GS = - 6 Volts at I_D = 0
Which of the following Q-points will give the highest trans-conductance gain for small signals?

The drain of an n-channel MOSFET is shorted to the gate so that V_GS = V_DS. The threshold voltage (V_T) of MOSFET is 1 V. If the drain current (I_D) is 1 mA for V_GS = 2 V, then for V_GS = 3 V, I_D is

If P is Passivation, Q is n-well implant, R is metallization and S is source/drain diffusion, then the order in which they are carried out in a standard n-well CMOS fabrication process, is