ExamSIDE (Powered by ExamGOAL)
Questions
PREVIOUS
1
GATE ECE 2000
MCQ (Single Correct Answer)
+2
-0.6
A sequential circuit using D flip-flop and logic gates is shown in the figure, where X and Y are the inputs and Z is the output. The circuit is GATE ECE 2000 Digital Circuits - Sequential Circuits Question 45 English
A
S–R Flip-Flop with inputs X = R and Y = S
B
S–R Flip-Flop with inputs X = S and Y = R
C
J–K Flip-Flop with inputs X = J and Y = K
D
J–K Flip-Flop with inputs X = K and Y = J
2
GATE ECE 2000
MCQ (Single Correct Answer)
+2
-0.6
In the figure, the J and K inputs of all the four Flip-Flops are made high. The frequency of the signal at output Y is GATE ECE 2000 Digital Circuits - Sequential Circuits Question 44 English
A
0.833 KHz
B
1.0 KHz
C
0.91 KHz
D
0.77 KHZ
3
GATE ECE 1999
MCQ (Single Correct Answer)
+2
-0.6
The ripple counter shown in the figure works as a GATE ECE 1999 Digital Circuits - Sequential Circuits Question 46 English
A
mod – 3 up counter
B
mod – 5 up counter
C
mod – 3 down counter
D
mod – 5 down counter
4
GATE ECE 1998
MCQ (Single Correct Answer)
+2
-0.6
In figure, A = 1 and B = 1. The input B is now replaced by a sequence 101010 ___, the outputs x and y will be GATE ECE 1998 Digital Circuits - Sequential Circuits Question 30 English
A
fixed at 0 and 1, respectively
B
x = 1010 ------while y = 0101 ------
C
x = 1010 ----and y = 1010 ----
D
fixed at 1 and 0, respectively
PREVIOUS
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous
Control Systems
Basic of Control Systems Signal Flow Graph and Block Diagram Time Response Analysis Stability Root Locus Diagram Frequency Response Analysis Compensators State Space Analysis
Digital Circuits
Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Electronic Devices and VLSI
Semiconductor Physics PN Junction BJT and FET IC Basics and MOSFET
Analog Circuits
Bipolar Junction Transistor FET and MOSFET Oscillators Operational Amplifier 555 Timer Frequency Response Diodes Feedback Amplifier Power Amplifier
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Probability and Statistics Differential Equations Complex Variable Numerical Methods Transform Theory
Microprocessors
Pin Details of 8085 and Interfacing with 8085 Instruction Set and Programming with 8085
Communications
Fundamentals of Information Theory Noise In Digital Communication Analog Communication Systems Digital Communication Systems Random Signals and Noise
Electromagnetics
Waveguides Antennas Miscellaneous Transmission Lines Maxwell Equations Uniform Plane Waves
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEEAP EAPCET
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12