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1
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
The following binary values were applied to the X and Y inputs of the NAND latch shown in the figure in the sequence indicated below: X=0, Y=1; X=0, Y=0; X=1, Y=1. The corresponding stable P, Q outputs will be GATE ECE 2007 Digital Circuits - Sequential Circuits Question 26 English
A
P = 1, Q = 0; P = 1, Q = 0; P = 1, Q = 0 or P = 0, Q = 1
B
P = 1, Q = 0; P = 0, Q = 1; or P = 0, Q = 1; P = 0, Q = 1
C
P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 0 or P = 0, Q = 1
D
P = 1, Q = 0; P = 1, Q = 1; P = 1, Q = 1
2
GATE ECE 2006
MCQ (Single Correct Answer)
+2
-0.6
Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q1Q0 sequence $$00 \to 01 \to 11 \to 10 \to 00 \to ......$$
The inputs D0 and D1 respectively should be connected as
GATE ECE 2006 Digital Circuits - Sequential Circuits Question 37 English
A
$$\overline {{Q_1}} \,and\,\ {{Q_0}} $$
B
$$\overline {{Q_0}} \,and\,\ {{Q_1}} $$
C
$$\,\overline {{Q_1}} {Q_0}\,and\,\overline {{Q_1}} {Q_0}$$
D
$$\,\overline {{Q_1}} \overline {{Q_0}} \,and\,{Q_1}{Q_0}$$
3
GATE ECE 2004
MCQ (Single Correct Answer)
+2
-0.6
In the modulo-6 ripple counter shown in the figure, the output of the 2-input gate is used to clear the J-K flip-flops. The 2-input gate is GATE ECE 2004 Digital Circuits - Sequential Circuits Question 38 English
A
a NAND gate
B
a NOR gate
C
an OR gate
D
an AND gate
4
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
A 4 bit ripple counter and a 4 bit synchronous counter are made using flip-flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then
A
R = 10ns, S = 40ns
B
R = 40ns, S = 10ns
C
R = 10ns, S = 30ns
D
R = 30ns, S = 10ns
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GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous
Control Systems
Signal Flow Graph and Block Diagram Time Response Analysis Compensators Basic of Control Systems Frequency Response Analysis Stability Root Locus Diagram State Space Analysis
Digital Circuits
Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters
General Aptitude
Numerical Ability Verbal Ability
Electronic Devices and VLSI
PN Junction Semiconductor Physics IC Basics and MOSFET BJT and FET
Analog Circuits
Diodes Bipolar Junction Transistor Frequency Response FET and MOSFET Oscillators Operational Amplifier Feedback Amplifier Power Amplifier 555 Timer
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Probability and Statistics Differential Equations Complex Variable Numerical Methods Transform Theory
Microprocessors
Pin Details of 8085 and Interfacing with 8085 Instruction Set and Programming with 8085
Communications
Analog Communication Systems Digital Communication Systems Random Signals and Noise Fundamentals of Information Theory Noise In Digital Communication
Electromagnetics
Maxwell Equations Transmission Lines Uniform Plane Waves Waveguides Antennas Miscellaneous
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