In the circuit shown, choose the correct timing diagram of the output (y) from the given waveforms W₁, W₂, W₃ and W₄.

The outputs of the two flip-flops Q₁, Q₂ in the figure shown are initialized to 0, 0. The sequence generated at Q₁ upon application of clock signal is

The state transition diagram for the logic circuit shown is

The output of a 3-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output V_o is