1
GATE ECE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown, choose the correct timing diagram of the output (y) from the given waveforms
W1, W2, W3 and W4.
2
GATE ECE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
The outputs of the two flip-flops Q1, Q2 in the figure shown are initialized to 0, 0. The sequence
generated at Q1 upon application of clock signal is
3
GATE ECE 2012
MCQ (Single Correct Answer)
+2
-0.6
The state transition diagram for the logic circuit shown is
A
B
C
D
4
GATE ECE 2011
MCQ (Single Correct Answer)
+2
-0.6
The output of a 3-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output Vo is
A
B
C
D
GATE ECE Subjects
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Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
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