1
GATE ECE 2011
MCQ (Single Correct Answer)
+2
-0.6
Two D flip-flops are connected as a synchronous counter that goes through the following QB QA sequence $$00 \to 11 \to 01 \to 10 \to 00 \to ......$$
2
GATE ECE 2009
MCQ (Single Correct Answer)
+2
-0.6
What are the counting states (Q1, Q2) for the counter shown in the figure below?
3
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For each of the positive edge-triggered J-K flip flop used in the following future, the propagation delay is $$\Delta $$T
Which of the following waveforms correctly represents the output at Q1?
4
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
The following binary values were applied to the X and Y inputs of the NAND latch
shown in the figure in the sequence indicated below: X=0, Y=1; X=0, Y=0; X=1, Y=1. The corresponding stable P, Q outputs will be
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Network Theory
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Analog Circuits
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Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Fourier Transform Representation of Continuous Time Signal Fourier Series Transmission of Signal Through Continuous Time LTI Systems Miscellaneous Sampling Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Discrete Time Signal Z Transform Transmission of Signal Through Discrete Time Lti Systems
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