1
GATE ECE 2016 Set 3
Numerical
+2
-0
In the circuit shown in the figure, transistor M1 is in saturation and has transconductance gm = 0.01 siemens. Ignoring internal parasitic capacitances and assuming the channel length modulation $$\lambda $$ to be zero, the small signal input pole frequency (in kHz) is _____ GATE ECE 2016 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 8 English
Your input ____
2
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown in the figure, the channel length modulation of all transistors is non-zero $$\left( {\lambda \ne 0} \right)$$. Also all transistors operate in saturation and have negligible body effect. The ac small signal voltage gain $$\left( {{V_0}/{V_{in}}} \right)$$ of the circuit is GATE ECE 2016 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 9 English
A
$$ - {g_{m1}}\left( {{r_{01}}//{r_{02}}//{r_{03}}} \right)$$
B
$$ - {g_{m1}}\left( {{r_{01}}//{1 \over {{g_{m3}}}}//{r_{03}}} \right)$$
C
$$ - {g_{m1}}\left( {{r_{01}}//\left( {{1 \over {{g_{m2}}}}//\,{r_{02}}} \right)//{r_{03}}} \right)$$
D
$$ - {g_{m1}}\left( {{r_{01}}//\left( {{1 \over {{g_{m3}}}}//\,{r_{03}}} \right)//{r_{02}}} \right)$$
3
GATE ECE 2016 Set 2
MCQ (Single Correct Answer)
+2
-0.6
A voltage VG is applied across a MOS capacitor with metal gate and p-type silicon substrate at T=300 K. The inversion carrier density (in number of carriers per unit area) for VG = 0.8 V is $$2\,\, \times \,\,{10^{11}}\,\,\,\,\,\,c{m^{ - 2}}$$ . For $${V_G}\,\, = \,\,1.3\,\,V,$$ the inversion carrier density is $$4\,\,\, \times \,\,\,{10^{11}}\,\,\,\,c{m^{ - 2}}.$$ What is the value of the inversion carrier density for VG = 1.8 V?
A
$$4.5 \times {10^{11}}\,\,c{m^{ - 2}}$$
B
$$6.0 \times {10^{11}}\,\,c{m^{ - 2}}$$
C
$$7.2 \times {10^{11}}\,\,c{m^{ - 2}}$$
D
$$8.4 \times {10^{11}}\,\,c{m^{ - 2}}$$
4
GATE ECE 2016 Set 2
Numerical
+2
-0
Consider a long-channel NMOS transistor with source and body connected together. Assume that the electron mobility is independent of VGS and VDS. Given,
gm = 0.5$$\mu {\rm A}/V$$ for VDS = 50 m V and VGS = 2V,
gd = $$8\mu {\rm A}/V$$ for VGS = 2 V and VDS = 0 V,
Where gm =$${{\partial {{\rm I}_D}} \over {\partial {V_{GS}}}}\,\,and\,\,{g_d}\,\, = \,{{\partial {{\rm I}_D}} \over {\partial {V_{DS}}}}$$

The threshold voltage (in volts) of the transistor is

Your input ____
GATE ECE Subjects
EXAM MAP
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12