1
GATE ECE 2016 Set 3
Numerical
+2
-0
In the circuit shown in the figure, transistor M1 is in saturation and has transconductance gm = 0.01 siemens. Ignoring internal parasitic capacitances and assuming the channel length modulation $$\lambda $$ to be zero, the small signal input pole frequency (in kHz) is _____ GATE ECE 2016 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 8 English
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2
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown in the figure, the channel length modulation of all transistors is non-zero $$\left( {\lambda \ne 0} \right)$$. Also all transistors operate in saturation and have negligible body effect. The ac small signal voltage gain $$\left( {{V_0}/{V_{in}}} \right)$$ of the circuit is GATE ECE 2016 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 9 English
A
$$ - {g_{m1}}\left( {{r_{01}}//{r_{02}}//{r_{03}}} \right)$$
B
$$ - {g_{m1}}\left( {{r_{01}}//{1 \over {{g_{m3}}}}//{r_{03}}} \right)$$
C
$$ - {g_{m1}}\left( {{r_{01}}//\left( {{1 \over {{g_{m2}}}}//\,{r_{02}}} \right)//{r_{03}}} \right)$$
D
$$ - {g_{m1}}\left( {{r_{01}}//\left( {{1 \over {{g_{m3}}}}//\,{r_{03}}} \right)//{r_{02}}} \right)$$
3
GATE ECE 2015 Set 2
Numerical
+2
-0
In a MOS capacitor with an oxide layer thickness of 10 nm, the maximum depletion layer thickness is 100 nm. The permittivities of the semiconductor and the oxide layer are $${\varepsilon _s}$$ and $${\varepsilon _{os}}$$ respectively. Asuuming $${\varepsilon _s}/{\varepsilon _{ox}} = 3$$ , the ratio of the maximum capacitance to the minimum capacitance of this MOS capacitor is________
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4
GATE ECE 2015 Set 1
Numerical
+2
-0
A MOSFET in saturation has a drain current of 1 mA for VDS =0.5V. If the channel length modulation coefficient is 0.05 V-1, the output resistance (in k$$\Omega $$) of the MOSFET is______
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