1
GATE ECE 2015 Set 3
Numerical
+2
-0
The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be 1 mA at a drain-source voltage of 5 V. When the drain-source voltage was increased to 6 V while keeping gate-source voltage same, the drain current increased to 1.02 mA. Assume that drain to source saturation voltage is much smaller than the applied drain-source voltage. The channel length modulation p[arameter $$\lambda $$ (in V-1) is _______
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2
GATE ECE 2014 Set 3
Numerical
+2
-0
The slope of the ID vs. VGS curve of an n-channel MOSFET in linear region is 10-3$${\Omega ^{ - 1}}$$ at VDS = 0.1V. For the same device, neglecting channel length modulation, the slope of the $$\sqrt {{{\rm I}_D}} $$ vs. V GS curve (in $$\sqrt A /V$$ ) under saturation region is approximately ______.
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3
GATE ECE 2014 Set 3
Numerical
+2
-0
An ideal MOS capacitor has boron doping concentration of 1015 cm-3 in the substrate. When a gate voltage is applied, a depletion region of width 0.5 $$\mu m$$ is formed with a surface (channel) potential of 0.2V. Given that $${\varepsilon _0} = 80854 \times {10^{ - 14}}F/cm$$ and the relative permittivities of silicon and silicon dioxide are 12 and 4, respectively, the peak electric field (in V/ $$\mu m$$ ) in the oxide region is ______
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4
GATE ECE 2014 Set 3
Numerical
+2
-0
For the MOSFET M1 shown in the figure, assume W/L =2, VDD = 2.0 V, $$\mu n$$ COX = 100$$\mu {\rm A}/{V^2}$$ and VTH =0.5 V. The transistor M1 switches from saturation region to linear regionm when Vin(in Volts) is _____ GATE ECE 2014 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 19 English
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