GATE ECE 2017 Set 2 | IC Basics and MOSFET Question 4 | Electronic Devices and VLSI

GATE ECE 2017 Set 2

MCQ (Single Correct Answer)

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For the circuit shown in the figure, P and Q are the inputs and Y is the output. GATE ECE 2017 Set 2 Electronic Devices and VLSI - IC Basics and MOSFET Question 40 English

GATE ECE 2017 Set 2 Electronic Devices and VLSI - IC Basics and MOSFET Question 40 English

The logic implemented by the circuit is

XNOR

XOR

NOR

GATE ECE 2016 Set 2

MCQ (Single Correct Answer)

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A long-channel NMOS transistor is biased in the linear region with V_DS = 50 mV and is used as a resistance. Which one of the following statements is NOT correct?

If the device width W is increased, the resistance decreases.

If the threshold voltage is reduced, the resistance decreases.

If the device length L is increased, the resistance increases.

If V_GS is increased, the resistance increases.

GATE ECE 2016 Set 2

MCQ (Single Correct Answer)

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Transistor geometries in a CMOS inverter have been adjusted to meet the requirement for worst case charge and discharge times for driving a load capacitor C. This design is to be converted to that of a NOR circuit in the same technology, so that its worst case charge and discharge times while driving the same capacitor are similar. The channel lengths of all transistors are to be kept unchanged. Which one of the following statements is correct? GATE ECE 2016 Set 2 Electronic Devices and VLSI - IC Basics and MOSFET Question 44 English

GATE ECE 2016 Set 2 Electronic Devices and VLSI - IC Basics and MOSFET Question 44 English

Widths of PMOS transistors should be doubled, while widths of NMOS transistors should be halved.

Widths of PMOS transistors should be doubled, while widths of NMOS transistors should not be changed.

Widths of PMOS transistors should be halved, while widths of NMOS transistors should not be changed.

Widths of PMOS transistors should be unchanged, while widths of NMOS transistors should be halved.

GATE ECE 2016 Set 3

MCQ (Single Correct Answer)

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The figure shows the band diagram of a Metal Oxide Semiconductor (MOS). The surface region of this MOS is in GATE ECE 2016 Set 3 Electronic Devices and VLSI - IC Basics and MOSFET Question 43 English