The output (Y) of the circuit shown in the figure is

The full forms of the abbreviations TTL and COMS in reference to logic families are

Both transistors T1 and T2 in figure have a threshold voltage of 1 Volt. The device parameters $${K_1}$$ and $${K_2}$$ of $${T_1}$$ and $${T_2}$$ are, respectively, 36 µA/ $${V^2}$$ and and 9$$9\,A/{V^2}$$. The output voltage $${V_0}$$ IS

The transistors used in a portion of the TTL gate shown in figure have β=100. the base-emitter voltage of is 0.7V for a transistor in active region and 0.75V for a transistor in saturation . If the sink current I=1mA and the output is at logic 0, then the current $${I_R}$$ I will be equal to