1
GATE ECE 2004
MCQ (Single Correct Answer)
+1
-0.3
Figure shows the internal schematic of a TTL AND-OR-Invert (AOI) gate. For the inputs shown in Figure, the output Y is
2
GATE ECE 2003
MCQ (Single Correct Answer)
+1
-0.3
The output of the 74 series of TTL gates is taken from a BJT in
3
GATE ECE 1999
MCQ (Single Correct Answer)
+1
-0.3
Commercially available ECL gates use two ground lines and one negative supply in order to
4
GATE ECE 1999
MCQ (Single Correct Answer)
+1
-0.3
A Darlington Emitter follower circuit is sometimes used in the output stage of a TTL gate in order to
Questions Asked from Logic Families (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics