1
GATE ECE 2004
MCQ (Single Correct Answer)
+1
-0.3
Figure shows the internal schematic of a TTL AND-OR-Invert (AOI) gate. For the inputs shown in Figure, the output Y is
2
GATE ECE 2003
MCQ (Single Correct Answer)
+1
-0.3
The output of the 74 series of TTL gates is taken from a BJT in
3
GATE ECE 1999
MCQ (Single Correct Answer)
+1
-0.3
Commercially available ECL gates use two ground lines and one negative supply in order to
4
GATE ECE 1999
MCQ (Single Correct Answer)
+1
-0.3
A Darlington Emitter follower circuit is sometimes used in the output stage of a TTL gate in order to
Questions Asked from Logic Families (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude