GATE ECE 2022 | Logic Families Question 1 | Digital Circuits

GATE ECE 2022

MCQ (More than One Correct Answer)

-0

Select the correct statement(s) regarding CMOS implementation of NOT gates.

Noise Margin High (NM_H) is always equal to the Noise Margin Low (NM_L), irrespective of the sizing of transistors.

Dynamic power consumption during switching is zero.

For a logical high input under steady state, the nMOSFET is in the linear regime of operation.

Mobility of electrons never influences the switching speed of the NOT gate.

GATE ECE 2014 Set 4

MCQ (Single Correct Answer)

-0.3

The output (Y) of the circuit shown in the figure is GATE ECE 2014 Set 4 Digital Circuits - Logic Families Question 9 English

$$\overline A + \overline B + \overline C $$

$$A + \overline B \,\overline {.\,C} + A.\,\overline C $$

$$\overline A + B + \overline C $$

$$A.B.\overline C $$

GATE ECE 2009

MCQ (Single Correct Answer)

-0.3

The full forms of the abbreviations TTL and COMS in reference to logic families are

Triple Transistor Logic and chip metal oxide semiconductor.

Tri-state Transistor Logic and chip metal oxide semiconductor.

Transistor Transistor Logic and chip metal oxide semiconductor.

Tri-state Transistor Transistor Logic and complementary metal oxide oxide silicon.

GATE ECE 2005

MCQ (Single Correct Answer)

-0.3

The transistors used in a portion of the TTL gate shown in figure have β=100. the base-emitter voltage of is 0.7V for a transistor in active region and 0.75V for a transistor in saturation . If the sink current I=1mA and the output is at logic 0, then the current $${I_R}$$ I will be equal to GATE ECE 2005 Digital Circuits - Logic Families Question 12 English