1
GATE ECE 1991
Fill in the Blanks
+1
-0
The CMOS equivalent of the following n MOS gate (figure) is ________ (draw the circuit ). GATE ECE 1991 Digital Circuits - Logic Families Question 25 English
2
GATE ECE 1991
Fill in the Blanks
+1
-0
In figure, the Boolean expression for the output in terms of inputs A, B and C when the clock ‘CK’ is high, is given by _______. GATE ECE 1991 Digital Circuits - Logic Families Question 24 English
3
GATE ECE 1989
MCQ (More than One Correct Answer)
+1
-0.3
Among the digital IC-families-ECL, TTL and CMOS:
A
ECL has the least propagation delay
B
TTL has the largest fan-out
C
CMOS has the biggest noise margin
D
TTL has the lowest power consumption
4
GATE ECE 1989
MCQ (Single Correct Answer)
+1
-0.3
A logic family has threshold voltage $${V_T}$$= 2V, minimum guaranteed output high voltage $${V_{OH}}$$= 4V, minimum accepted input high voltage $${V_{IH}}$$ = 3V, maximum guaranteed output low voltage $${V_{OL}}$$ = 1V, and maximum accepted input low voltage N $${V_{IL}}$$ =1.5V. Its noise margin is
A
2V
B
1V
C
1.5V
D
0.5V
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