1
GATE ECE 2009
+2
-0.6
What are the minimum number of 2-to 1 multiplexers required to generate a 2-input AND gate and a 2-input EX-OR gate?
A
1 and 2
B
1 and 3
C
1 and 1
D
2 and 2
2
GATE ECE 2008
+2
-0.6
For the circuit shown in the following figure $${I_0}$$ - $${I_3}$$ are inputs to the 4:1 multiplexer R(MSB) and S are control bits. tHE OUTPUT Zcan be represented by
A
PQ+P$$\overline {Q\,} S + \,\overline {Q\,} \overline R \,\overline S$$
B
$$P\,\overline {Q\,} + PQ\,\overline R \, + \,\overline R \,\overline {Q\,} \,\overline S$$
C
$$P\,\overline {Q\,} \overline R + \overline P \,QR + PQRS + \overline {Q\,} \overline R \,\overline S$$
D
$$PQ\,\overline R + PQR\,\overline S + P\overline {Q\,} \overline R \,S + \overline {Q\,} \overline R \,\overline S$$
3
GATE ECE 2007
+2
-0.6
In the following circuit, X is given by
A
$$X = \,A\overline B \,\overline C + \overline A \,B\,\overline C + \overline A \,\overline B C + ABC$$
B
$$X = \,\overline A \,BC + A\overline B C + AB\overline C + \overline A \,\overline B \,\overline C$$
C
$$X = AB + BC + AC$$
D
$$X = \,\overline A \,\overline B \, + \overline B \,\overline C \, + \overline A \,\overline C$$
4
GATE ECE 2004
+2
-0.6
The minimum number of 2 to 1 multiplexers required to realize a 4 to 1 mutliplexer is
A
1
B
2
C
3
D
4
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