1
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For the circuit shown in the following figure $${I_0}$$ - $${I_3}$$ are inputs to the 4:1 multiplexer R(MSB) and S are control bits. tHE OUTPUT Zcan be represented by GATE ECE 2008 Digital Circuits - Combinational Circuits Question 27 English
A
PQ+P$$\overline {Q\,} S + \,\overline {Q\,} \overline R \,\overline S $$
B
$$P\,\overline {Q\,} + PQ\,\overline R \, + \,\overline R \,\overline {Q\,} \,\overline S $$
C
$$P\,\overline {Q\,} \overline R + \overline P \,QR + PQRS + \overline {Q\,} \overline R \,\overline S $$
D
$$PQ\,\overline R + PQR\,\overline S + P\overline {Q\,} \overline R \,S + \overline {Q\,} \overline R \,\overline S $$
2
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
In the following circuit, X is given by GATE ECE 2007 Digital Circuits - Combinational Circuits Question 28 English
A
$$X = \,A\overline B \,\overline C + \overline A \,B\,\overline C + \overline A \,\overline B C + ABC$$
B
$$X = \,\overline A \,BC + A\overline B C + AB\overline C + \overline A \,\overline B \,\overline C $$
C
$$X = AB + BC + AC$$
D
$$X = \,\overline A \,\overline B \, + \overline B \,\overline C \, + \overline A \,\overline C $$
3
GATE ECE 2004
MCQ (Single Correct Answer)
+2
-0.6
The minimum number of 2 to 1 multiplexers required to realize a 4 to 1 mutliplexer is
A
1
B
2
C
3
D
4
4
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
The circuit shown in figure converts GATE ECE 2003 Digital Circuits - Combinational Circuits Question 31 English
A
BCD to binary code
B
Binary to excess – 3 code
C
Excess – 3 to Gray code
D
Gray to Binary code.
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