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1
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For the circuit shown in the following figure $${I_0}$$ - $${I_3}$$ are inputs to the 4:1 multiplexer R(MSB) and S are control bits. tHE OUTPUT Zcan be represented by GATE ECE 2008 Digital Circuits - Combinational Circuits Question 30 English
A
PQ+P$$\overline {Q\,} S + \,\overline {Q\,} \overline R \,\overline S $$
B
$$P\,\overline {Q\,} + PQ\,\overline R \, + \,\overline R \,\overline {Q\,} \,\overline S $$
C
$$P\,\overline {Q\,} \overline R + \overline P \,QR + PQRS + \overline {Q\,} \overline R \,\overline S $$
D
$$PQ\,\overline R + PQR\,\overline S + P\overline {Q\,} \overline R \,S + \overline {Q\,} \overline R \,\overline S $$
2
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
In the following circuit, X is given by GATE ECE 2007 Digital Circuits - Combinational Circuits Question 31 English
A
$$X = \,A\overline B \,\overline C + \overline A \,B\,\overline C + \overline A \,\overline B C + ABC$$
B
$$X = \,\overline A \,BC + A\overline B C + AB\overline C + \overline A \,\overline B \,\overline C $$
C
$$X = AB + BC + AC$$
D
$$X = \,\overline A \,\overline B \, + \overline B \,\overline C \, + \overline A \,\overline C $$
3
GATE ECE 2004
MCQ (Single Correct Answer)
+2
-0.6
The minimum number of 2 to 1 multiplexers required to realize a 4 to 1 mutliplexer is
A
1
B
2
C
3
D
4
4
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
The circuit shown in figure has 4 boxes each described by inputs P, Q, R and outputs Y, Z with
Y = $$\,P \oplus \,Q\, \oplus \,R$$
z= $$RQ + \overline P R\, + Q\,\overline P $$ GATE ECE 2003 Digital Circuits - Combinational Circuits Question 33 English The circuit acts as a
A
4 bit adder giving P + Q
B
4 bit subtractor-giving P - Q
C
4 bit subtractor-giving Q - P
D
4 bit adder giving P + Q + R
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GATE ECE Subjects
Network Theory
State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous
Control Systems
Basic of Control Systems Signal Flow Graph and Block Diagram Time Response Analysis Stability Root Locus Diagram Frequency Response Analysis Compensators State Space Analysis
Electronic Devices and VLSI
PN Junction Semiconductor Physics IC Basics and MOSFET BJT and FET
Analog Circuits
Diodes Bipolar Junction Transistor Frequency Response FET and MOSFET Oscillators Operational Amplifier Feedback Amplifier Power Amplifier 555 Timer
Digital Circuits
Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters
Microprocessors
Instruction Set and Programming with 8085 Pin Details of 8085 and Interfacing with 8085
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Fundamentals of Information Theory Noise In Digital Communication Analog Communication Systems Digital Communication Systems Random Signals and Noise
Electromagnetics
Waveguides Antennas Miscellaneous Transmission Lines Maxwell Equations Uniform Plane Waves
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Complex Variable Probability and Statistics Differential Equations Numerical Methods Transform Theory
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