GATE ECE 2008 | Combinational Circuits Question 23 | Digital Circuits

GATE ECE 2008

MCQ (Single Correct Answer)

-0.6

For the circuit shown in the following figure $${I_0}$$ - $${I_3}$$ are inputs to the 4:1 multiplexer R(MSB) and S are control bits. tHE OUTPUT Zcan be represented by GATE ECE 2008 Digital Circuits - Combinational Circuits Question 30 English

GATE ECE 2008 Digital Circuits - Combinational Circuits Question 30 English

PQ+P$$\overline {Q\,} S + \,\overline {Q\,} \overline R \,\overline S $$

$$P\,\overline {Q\,} + PQ\,\overline R \, + \,\overline R \,\overline {Q\,} \,\overline S $$

$$P\,\overline {Q\,} \overline R + \overline P \,QR + PQRS + \overline {Q\,} \overline R \,\overline S $$

$$PQ\,\overline R + PQR\,\overline S + P\overline {Q\,} \overline R \,S + \overline {Q\,} \overline R \,\overline S $$

GATE ECE 2007

MCQ (Single Correct Answer)

-0.6

In the following circuit, X is given by GATE ECE 2007 Digital Circuits - Combinational Circuits Question 31 English

$$X = \,A\overline B \,\overline C + \overline A \,B\,\overline C + \overline A \,\overline B C + ABC$$

$$X = \,\overline A \,BC + A\overline B C + AB\overline C + \overline A \,\overline B \,\overline C $$

$$X = AB + BC + AC$$

$$X = \,\overline A \,\overline B \, + \overline B \,\overline C \, + \overline A \,\overline C $$

GATE ECE 2004

MCQ (Single Correct Answer)

-0.6

The minimum number of 2 to 1 multiplexers required to realize a 4 to 1 mutliplexer is

GATE ECE 2003

MCQ (Single Correct Answer)

-0.6

The circuit shown in figure converts GATE ECE 2003 Digital Circuits - Combinational Circuits Question 34 English

BCD to binary code

Binary to excess – 3 code

Excess – 3 to Gray code

Gray to Binary code.

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State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous

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