A 4-bit priority encoder has inputs $D_3, D_2, D_1,$ and $D_0$ in descending order of priority. The two-bit output $AB$ is generated as 00, 01, 10, and 11 corresponding to inputs $D_3, D_2, D_1,$ and $D_0$, respectively. The Boolean expression of the output bit $B$ is _______.
The propagation delay of the 2 x 1 MUX shown in the circuit is 10 ns. Consider the propagation delay of the inverter as 0 ns.
If S is set to 1 then the output Y is _______.
A
a square wave of frequency 100 MHz
B
a square wave of frequency 50 MHz
C
constant at 0
D
constant at 1
3
GATE ECE 2018
MCQ (Single Correct Answer)
+2
-0.67
A four-variable Boolean function is realized using
4 $$ \times $$ 1
multiplexers as shown in the
figure.
The minimized expression for F(U, V, W, X)
is
A
$$\left( {UV + \overline U \overline V } \right)\overline W $$
B
$$\left( {UV + \overline U \overline V } \right)\left( {\overline W \overline X + \overline W X} \right)$$
C
$$\left( {U\overline V + \overline U V} \right)\overline W $$
D
$$\left( {U\overline V + \overline U V} \right)\left( {\overline W \overline X + \overline W X} \right)$$
4
GATE ECE 2017 Set 2
Numerical
+2
-0
Figure I shows a 4-bits ripple carry adder realized using full adders and Figure II shows the circuit of a full-adder (FA). The
propagation delay of the XOR, AND and OR gates in Figure II are 20 ns, 15 ns and 10 ns respectively. Assume all the inputs to
the 4-bit adder are initially reset to 0.
At t=0, the inputs to the 4-bit adder are changed to $${X_3}$$$${X_2}$$$${X_1}$$$${X_0}$$ =1100, $${Y_3}$$$${Y_2}$$$${Y_1}$$$${Y_0}$$ = 0100 and $${Z_0}$$=1.
The output of the ripple carry adder will be stable at t (in ns) = ____
At t=0, the inputs to the 4-bit adder are changed to $${X_3}$$$${X_2}$$$${X_1}$$$${X_0}$$ =1100, $${Y_3}$$$${Y_2}$$$${Y_1}$$$${Y_0}$$ = 0100 and $${Z_0}$$=1.
The output of the ripple carry adder will be stable at t (in ns) = ____