1
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown, 𝑊𝑊 and 𝑌𝑌 are MSBs of the control inputs. The output 𝐹𝐹 is given by
2
GATE ECE 2010
MCQ (Single Correct Answer)
+2
-0.6
The Boolean function realized by the logic circuit shown is
3
GATE ECE 2009
MCQ (Single Correct Answer)
+2
-0.6
What are the minimum number of 2-to 1 multiplexers required to generate a 2-input AND gate and a 2-input EX-OR gate?
4
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For the circuit shown in the following figure $${I_0}$$ - $${I_3}$$ are inputs to the 4:1 multiplexer R(MSB) and S are control bits. tHE OUTPUT Zcan be represented by
Questions Asked from Combinational Circuits (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE 2024 (2)
GATE ECE 2018 (1)
GATE ECE 2017 Set 2 (2)
GATE ECE 2016 Set 1 (2)
GATE ECE 2016 Set 3 (1)
GATE ECE 2015 Set 2 (1)
GATE ECE 2014 Set 4 (2)
GATE ECE 2014 Set 3 (2)
GATE ECE 2010 (1)
GATE ECE 2009 (1)
GATE ECE 2008 (1)
GATE ECE 2007 (1)
GATE ECE 2004 (1)
GATE ECE 2003 (2)
GATE ECE 2001 (1)
GATE ECE 1999 (1)
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics