ExamSIDE (Powered by ExamGOAL)
Questions
PREVIOUS NEXT
1
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown, 𝑊𝑊 and 𝑌𝑌 are MSBs of the control inputs. The output 𝐹𝐹 is given by GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 24 English
A
$$F = \,W\overline X + \overline W X + \overline Y \,\overline Z $$
B
$$F = \,W\overline X + \overline W X + \overline Y \,Z$$
C
$$F = \,W\overline X \,\overline Y + \overline W X\,\overline Y $$
D
$$F = \,(\overline W + \overline X )\,\,\overline Y \,\overline Z $$
2
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
If X and Y are inputs and the Difference (D = X – Y) and the Borrow (B) are the outputs, which one of the following diagrams implements a half-subtractor?
A
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 23 English Option 1
B
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 23 English Option 2
C
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 23 English Option 3
D
GATE ECE 2014 Set 3 Digital Circuits - Combinational Circuits Question 23 English Option 4
3
GATE ECE 2010
MCQ (Single Correct Answer)
+2
-0.6
The Boolean function realized by the logic circuit shown is GATE ECE 2010 Digital Circuits - Combinational Circuits Question 25 English
A
F=∑m(0,1,3,5,9,10,14)
B
F=∑m(2,3,5,7,8,12,13)
C
F=∑m(1,2,4,5,11,14,15)
D
F=∑m(2,3,5,7,8,9,12)
4
GATE ECE 2009
MCQ (Single Correct Answer)
+2
-0.6
What are the minimum number of 2-to 1 multiplexers required to generate a 2-input AND gate and a 2-input EX-OR gate?
A
1 and 2
B
1 and 3
C
1 and 1
D
2 and 2
PREVIOUS NEXT
GATE ECE Subjects
Network Theory
Network Elements Network Theorems Transient Response Sinusoidal Steady State Response Two Port Networks Network Graphs State Equations For Networks Miscellaneous
Control Systems
Signal Flow Graph and Block Diagram Time Response Analysis Compensators Basic of Control Systems Frequency Response Analysis Stability Root Locus Diagram State Space Analysis
Electronic Devices and VLSI
Semiconductor Physics PN Junction BJT and FET IC Basics and MOSFET
Analog Circuits
Bipolar Junction Transistor FET and MOSFET Oscillators Operational Amplifier 555 Timer Frequency Response Diodes Feedback Amplifier Power Amplifier
Digital Circuits
Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters
Microprocessors
Pin Details of 8085 and Interfacing with 8085 Instruction Set and Programming with 8085
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Communications
Fundamentals of Information Theory Noise In Digital Communication Analog Communication Systems Digital Communication Systems Random Signals and Noise
Electromagnetics
Maxwell Equations Transmission Lines Uniform Plane Waves Waveguides Antennas Miscellaneous
General Aptitude
Numerical Ability Verbal Ability
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Complex Variable Probability and Statistics Differential Equations Numerical Methods Transform Theory
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEE
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
CBSE
Class 12