1
GATE ECE 2009
MCQ (Single Correct Answer)
+2
-0.6
In the circuit below, the diode is ideal. The voltage V is given by GATE ECE 2009 Electronic Devices and VLSI - PN Junction Question 9 English
A
Min (Vi, 1)
B
Max (Vi, 1)
C
Min (-Vi, 1)
D
Max (-Vi, 1)
2
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
A P+-N junction has a built-in potential of 0.8 V. The depletion layer width at a reverse bias of 1.2V is 2 µm. For a reverse bias of 7.2 V, the depletion layer width will be:
A
4 µm
B
4.9 µm
C
8 µm
D
12 µm
3
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
The Zener diode in the regulator circuit shown in figure has a Zener voltage of 5.8 Volts and a Zener knee current of 0.5 mA. The maximum load current drawn from this circuit ensuring proper functioning over the input voltage range between 20 and 30 Volts, is GATE ECE 2005 Electronic Devices and VLSI - PN Junction Question 12 English
A
23.7 mA
B
14.2 mA
C
13.7 mA
D
24.2 mA
4
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
A Silicon PN junction diode under reverse bias has depletion region of width 10 µm. The relative permittivity of Silicon, ɛr = 11.7 and the permittivity of free space ɛ0 = 8.854 × 10-12 F/m.The depletion capacitance of the diode per square meter is
A
100 μF
B
10 μF
C
1 μF
D
20 μF
GATE ECE Subjects
EXAM MAP
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
CBSE
Class 12