1
GATE ECE 2011
MCQ (Single Correct Answer)
+1
-0.3
The logic function implemented by the circuit below is (ground implies a logic "0" GATE ECE 2011 Digital Circuits - Combinational Circuits Question 41 English
A
F= AND (P, Q)
B
F= OR (P, Q)
C
F= XNOR (P, Q)
D
F= XOR (P, Q)
2
GATE ECE 2005
MCQ (Single Correct Answer)
+1
-0.3
The Boolean function f implemented in the figure using two input multiplexers is GATE ECE 2005 Digital Circuits - Combinational Circuits Question 9 English
A
$$A\overline B C\, + \,AB\overline C $$
B
$$ABC\, + \,A\overline B \overline C $$
C
$$\overline A BC\, + \,\overline A \overline B \overline C $$
D
$$\overline {AB} C\, + \,\overline A B\overline C $$
3
GATE ECE 2003
MCQ (Single Correct Answer)
+1
-0.3
With out any additional circuitry, an 8:1 MUX can be used to obtain
A
some but not all Boolean functions of 3 variables
B
all function of 3 variables but none of 4 variables
C
all functions of 3 variables and some but not all of 4 variables
D
all functions of 4 variablesand some but not all of 4 variables
4
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
A 2-bit binary multiplier can be implemented using
A
2 input AND gates only.
B
2 number of 2-input XOR gates and 6 number of 2-input AND gates.
C
Two 2-input NOR gates and one XNOR gate.
D
XOR gates and shift registers.
GATE ECE Subjects
EXAM MAP
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12