1

GATE ECE 2022

MCQ (Single Correct Answer)

+1

-0.33

Consider the 2-bit multiplexer (MUX) shown in the figure. For OUTPUT to be the XOR of C and D, the values for A_{0}, A_{1}, A_{2} and A_{3} are ___________.

2

GATE ECE 2017 Set 2

MCQ (Single Correct Answer)

+1

-0.3

Consider the circuit shown in the figure.
The Boolean expression F implemented by the circuit is

3

GATE ECE 2016 Set 2

MCQ (Single Correct Answer)

+1

-0.3

A 4:1 multiplexer is to be used for generating the output carry of a full adder. A and B are the bits to be added while đļin
is the input carry and đļout is the output carry. A and B are to be used as the select bits with A being the more significant
select bit.
Which one of the following statements correctly describes the choice of signals to be connected to the inputs $${I_0}$$, $${I_1}$$, $${I_2 }$$ and $${I_3}$$ so that the output is C$$_{out}$$?

4

GATE ECE 2014 Set 2

MCQ (Single Correct Answer)

+1

-0.3

In a half-subtractor circuit with X and Y as inputs, the Borrow (M) and Difference (N = X - Y) are given by

Questions Asked from Combinational Circuits (Marks 1)

Number in Brackets after Paper Indicates No. of Questions

GATE ECE Subjects

Signals and Systems

Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous

Network Theory

Control Systems

Digital Circuits

General Aptitude

Electronic Devices and VLSI

Analog Circuits

Engineering Mathematics

Microprocessors

Communications

Electromagnetics