1
GATE ECE 2025
MCQ (Single Correct Answer)
+1
-0.33

A full adder and an XOR gate are used to design a digital circuit with inputs $X, Y$, and $Z$, and output $F$, as shown below. The input $Z$ is connected to the carry-in input of the full adder.

If the input $Z$ is set to logic ' 1 ', then the circuit functions as __________ with $X$ and $Y$ as inputs.

GATE ECE 2025 Digital Circuits - Combinational Circuits Question 4 English
A
an adder
B
a subtractor
C
a multiplier
D
a binary to Gray code converter
2
GATE ECE 2023
MCQ (Single Correct Answer)
+1
-0.33

In the circuit shown below, P and Q are the inputs. The logical function realized by the circuit shown below is

GATE ECE 2023 Digital Circuits - Combinational Circuits Question 7 English

A
Y = PQ
B
Y = P + Q
C
Y = $$\mathrm{\overline {PQ} }$$
D
Y = $$\mathrm{\overline {P+Q} }$$
3
GATE ECE 2022
MCQ (Single Correct Answer)
+1
-0.33

Consider the 2-bit multiplexer (MUX) shown in the figure. For OUTPUT to be the XOR of C and D, the values for A0, A1, A2 and A3 are ___________.

GATE ECE 2022 Digital Circuits - Combinational Circuits Question 8 English

A
A0 = 0, A1 = 0, A2 = 1, A3 = 1
B
A0 = 1, A1 = 0, A2 = 1, A3 = 0
C
A0 = 0, A1 = 1, A2 = 1, A3 = 0
D
A0 = 1, A1 = 1, A2 = 0, A3 = 0
4
GATE ECE 2021
MCQ (Single Correct Answer)
+1
-0.33

The propagation delays of the XOR gate, AND gate and multiplexer (MUX) in the circuit shown in the figure are $4 \mathrm{~ns}, 2 \mathrm{~ns}$ and 1 ns respectively.

GATE ECE 2021 Digital Circuits - Combinational Circuits Question 3 EnglishIf all the inputs $P, Q, R, S$ and $T$ are applied simultaneously and held constant, the maximum propagation delay of the circuit is

A

3 ns

B

6 ns

C

5 ns

D

7 ns

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