1
GATE ECE 2023
MCQ (Single Correct Answer)
+1
-0.33
In the circuit shown below, P and Q are the inputs. The logical function realized by the circuit shown below is
2
GATE ECE 2022
MCQ (Single Correct Answer)
+1
-0.33
Consider the 2-bit multiplexer (MUX) shown in the figure. For OUTPUT to be the XOR of C and D, the values for A0, A1, A2 and A3 are ___________.
3
GATE ECE 2017 Set 2
MCQ (Single Correct Answer)
+1
-0.3
Consider the circuit shown in the figure.
The Boolean expression F implemented by the circuit is
4
GATE ECE 2016 Set 2
MCQ (Single Correct Answer)
+1
-0.3
A 4:1 multiplexer is to be used for generating the output carry of a full adder. A and B are the bits to be added while 𝐶in
is the input carry and 𝐶out is the output carry. A and B are to be used as the select bits with A being the more significant
select bit.
Which one of the following statements correctly describes the choice of signals to be connected to the inputs $${I_0}$$, $${I_1}$$, $${I_2 }$$ and $${I_3}$$ so that the output is C$$_{out}$$?
Questions Asked from Combinational Circuits (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude