An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to -10 V . If the input voltage $v_1$ liesbetween $\pm 10 \mathrm{~V}$, the minimum and the maximum value of $v_G$ required for proper sampling and holding respectively, are

The ac schematic of an NMOS common-source stage is shown in the figure below, where part of the biasing circuits has been omitted for simplicity. For the n -channel MOSFET M, the transconductance g_m = 1 mA/V, and body effect and channel length modulation effect are to be neglected. The lower cutoff frequency in Hz of the circuit is approximately at

An n-channel depletion MOSFET has following two points on its I_D - V_GS curve:

(i)V_GS = 0 at I_d = 12 mA and
(ii)V_GS = -6 Volts at Z_o =$$\infty $$

Which of the following Q-points will give the highest transconductance gain for small signals?

For an n-channel MOSFET and its transfer curve shown in the figure, the threshold voltage is