For an $n$-channel silicon MOSFET with 10 nm gate oxide thickness, the substrate sensitivity ( $\partial V_T / \partial\left|V_{B S}\right|$ ) is found to be $50 \mathrm{mV} / \mathrm{V}$ at a substrate voltage $\left|V_{B S}\right|=2 \mathrm{~V}$, where $V_T$ is the threshold voltage of the MOSFET. Assume that, $\left|V_{B S}\right| \gg 2 \phi_B$, where $q \phi_B$ is the separation between the Femi energy level $E_F$ and the intrinsic level $E_i$ in the bulk. Parameters given are
Electron charge $(q)=1.6 \times 10^{-9} \mathrm{C}$
Vacuum permittivity $\left(\varepsilon_o\right)=8.85 \times 10^{-12} \mathrm{~F} / \mathrm{m}$
Relative permittivity of silicon $\left(\varepsilon_{S i}\right)=12$
Relative permittivity of oxide $\left(\varepsilon_{o x}\right)=4$
The doping concentration of the substrate is
Using the incremental low frequency small - signal model of the MOS device, the Norton equivalent resistance of the following circuit is

An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to -10 V . If the input voltage $v_1$ liesbetween $\pm 10 \mathrm{~V}$, the minimum and the maximum value of $v_G$ required for proper sampling and holding respectively, are

GATE ECE Subjects
Browse all chapters by subject