1
GATE ECE 2006
+2
-0.6
In the transistor amplifier circuit shown in the figure below, the transistor has the following parameters: $${\beta _{DC}}$$ = 60, $${V_{BE}}$$ = 0.7V, $${h_{ie}} \to \,\,\infty$$, $${h_{fe}} \to \,\,\infty$$. The capacitance CC can be assumed to be infinite.

Under the DC conditions, the collector-to emitter voltage drop is

A
4.8 Volts
B
5.3 Volts
C
6.0 Volts
D
6.6 Volts
2
GATE ECE 2006
+2
-0.6
In the transistor amplifier circuit shown in the figure below, the transistor has the following parameters: $${\beta _{DC}}$$ = 60, $${V_{BE}}$$ = 0.7V, $${h_{ie}} \to \,\,\infty$$, $${h_{fe}} \to \,\,\infty$$. The capacitance CC can be assumed to be infinite.

The small-signal gain of the amplifier $${{{V_c}} \over {{V_s}}}$$ is

A
-10
B
-5.3
C
5.3
D
10
3
GATE ECE 2005
+2
-0.6
The circuit using a BJT with β = 50 and VBE = 0.7 V is shown in the figure. The base current IB and collector voltage VC are respectively
A
43 μA and 11.4 Volts
B
40 μA and 16 Volts
C
45 μA and 11 Volts
D
50 μA and 10 Volts
4
GATE ECE 2005
+2
-0.6
For an npn transistor connected as shown in the figure, VBE = 0.7 volts. Given that reverse saturation current of the junction at room temperature $${300^0}$$ K is $${10^{ - 13}}\,{\rm A}$$, the emitter current is $$\left( {\eta \, = \,1} \right)$$
A
30 mA
B
39 mA
C
49 mA
D
20 mA
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