1
GATE ECE 2016 Set 2
MCQ (Single Correct Answer)
+2
-0.6
In an N bit flash ADC, the analog voltage is fed simultaneously to 2N− 1 comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source Vin(whose output is being converted to digital format) has a source resistance of 75 Ω as shown in the circuit diagram below and the input capacitance of each comparator is 8 pF. The input must settle to an accuracy of 1/2 LSB even for a full scale input change for properconversion. Assume that the time taken by the thermometer to binary encoder is negligible. GATE ECE 2016 Set 2 Digital Circuits - Analog to Digital and Digital to Analog Converters Question 7 English If the flash ADC has 8 bit resolution, which one of the following alternatives is closest to the maximum sampling rate?
A
1 megasamples per second
B
6 megasamples per second
C
64 megasamples per second
D
256 megasamples per second
2
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
In the following circuit, the comparator output is logic “I” if V1 > V2 and is logic “0” otherwise. The D/A conversion is done as per the relation $$${V_{DAC}} = \sum\limits_{n = 0}^3 {{2^{n - 1}}{b_n}\,\,} Volts,$$$ where b3(MSB), b2, b1 and b0 (LSB) are the counter outputs.

The counter starts from the clear state.

GATE ECE 2008 Digital Circuits - Analog to Digital and Digital to Analog Converters Question 2 English

The magnitude of the error between VDAC and Vin at steady state in volts is

A
0.2
B
0.3
C
0.5
D
1
3
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
In the following circuit, the comparator output is logic “I” if V1 > V2 and is logic “0” otherwise. The D/A conversion is done as per the relation $$${V_{DAC}} = \sum\limits_{n = 0}^3 {{2^{n - 1}}{b_n}\,\,} Volts,$$$ where b3(MSB), b2, b1 and b0 (LSB) are the counter outputs.

The counter starts from the clear state.

GATE ECE 2008 Digital Circuits - Analog to Digital and Digital to Analog Converters Question 3 English

The stable reading of the LED display is

A
06
B
07
C
12
D
13
4
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
In the digital-to-Analog converter circuit shown in the figure below,
$${V_{R\,}}\, = \,10V$$ and $$R\, = \,10k\Omega $$ GATE ECE 2007 Digital Circuits - Analog to Digital and Digital to Analog Converters Question 5 English

The current i is

A
$$31.25\,\mu {\rm A}$$
B
$$62.5\,\mu {\rm A}$$
C
$$125\,\mu {\rm A}$$
D
$$250\,\mu {\rm A}$$
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