1
GATE ECE 2024
Numerical
+2
-1.33

An NMOS transistor operating in the linear region has $I_{D}$ of 5 $\mu$A at $V_{DS}$ of 0.1 V. Keeping $V_{GS}$ constant, the $V_{DS}$ is increased to 1.5 V.

Given that $\mu_{n}C_{ox} \frac{W}{L}$ = 50 $\mu$A/$V^2$, the transconductance at the new operating point (in $\mu$A/V, rounded off to two decimal places) is ______.

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2
GATE ECE 2022
MCQ (Single Correct Answer)
+2
-0.67

Consider an ideal long channel nMOSFET (enhancement-mode) with gate length 10 $$\mu$$m and width 100 $$\mu$$m. The product of electron mobility ($$\mu$$n) and oxide capacitance per unit area (Cox) is $$\mu$$nCox = 1 mA/V2. The threshold voltage of the transistor is 1 V. For a gate-to-source voltage VGS = [2 $$-$$ sin(2t)] V and drain-to source voltage VDS = 1 V (substrate connected to the source), the maximum value of the drain-to-source current is ___________.

A
40 mA
B
20 mA
C
15 mA
D
5 mA
3
GATE ECE 2022
Numerical
+2
-0

Consider the circuit shown with an ideal long channel nMOSFET (enhancement mode, substrate is connected to the source). The transistor is appropriately biased in the saturation region with VGG and VDD such that it acts as a linear amplifier. vi is the small-signal ac input voltage. vA and vB represent the small-signal voltages at the nodes A and B, respectively. The value of $${{{v_A}} \over {{v_B}}}$$ is __________ (rounded off to one decimal place).

GATE ECE 2022 Analog Circuits - FET and MOSFET Question 6 English

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4
GATE ECE 2013
MCQ (Single Correct Answer)
+2
-0.6
The ac schematic of an NMOS common-source stage is shown in the figure below, where part of the biasing circuits has been omitted for simplicity. For the n -channel MOSFET M, the transconductance gm = 1 mA/V, and body effect and channel length modulation effect are to be neglected. The lower cutoff frequency in Hz of the circuit is approximately at GATE ECE 2013 Analog Circuits - FET and MOSFET Question 13 English
A
8
B
32
C
50
D
200
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