1
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
If the input to the ideal comparator shown in figure is sinusoidal signal of 8V
(peak to peak) without any DC component, then the output of the comparator
has a duty cycle of
2
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
If the Op-Amp in the figure is ideal, the output voltage Vout will equal to
3
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
In the figure assume the Op-Amps to be ideal. The output V0 of the circuit is
4
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
An Amplifier using an Op-Amp with a Slew-Rate SR = V/$$\mu $$sec, has a gain of 40 dB. If this amplifier has to faith fully amplify sinsoidal signals from dc to 20 KHz. Without introducing any Slew Rate induced distortion, then the input signal level must not exceed.
GATE ECE Subjects
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General Aptitude
Network Theory
Microprocessors
Signals and Systems
Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Fourier Transform Representation of Continuous Time Signal Fourier Series Transmission of Signal Through Continuous Time LTI Systems Miscellaneous Sampling Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Discrete Time Signal Z Transform Transmission of Signal Through Discrete Time Lti Systems
Electromagnetics
Digital Circuits
Electronic Devices and VLSI
Control Systems
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Engineering Mathematics