The opamps in the circuit shown are ideal, but have saturation voltages of ±10 V.
![GATE ECE 2024 Analog Circuits - Operational Amplifier Question 2 English](https://app-content.cdn.examgoal.net/fly/@width/image/jaoe38c1lxkzydsh/553009e9-29af-4021-a1b1-97c5aeafdf4d/0a226c10-2dc5-11ef-ab56-674ed58d7efd/file-jaoe38c1lxkzydsi.png?format=png)
Assume that the initial inductor current is 0 A. The input voltage (Vi) is a triangular signal with peak voltages of ±2 V and time period of 8 μs. Which one of the following statements is true?
In the circuit below, the opamp is ideal.
![GATE ECE 2024 Analog Circuits - Operational Amplifier Question 1 English](https://app-content.cdn.examgoal.net/fly/@width/image/jaoe38c1lxl01ui4/c3a7ba5d-dd17-425d-aec3-1125a2ca1b8f/6a78bec0-2dc5-11ef-ab56-674ed58d7efd/file-jaoe38c1lxl01ui5.png?format=png)
If the circuit is to show sustained oscillations, the respective values of $R_1$ and the corresponding frequency of oscillation are ____.
The $$\mathrm{{{{V_{OUT}}} \over {{V_{IN}}}}}$$ of the circuit shown below is
A sample and hold circuit is implemented using a resistive switch and a capacitor with a time constant of 1 $$\mu$$s. The time for the sampling switch to stay closed to charge a capacitor adequately to a full scale voltage of 1 V with 12-bit accuracy is ___________ $$\mu$$s (rounded off to two decimal places).