ExamSIDE (Powered by ExamGOAL)
Questions
PREVIOUS NEXT
1
GATE ECE 2014 Set 3
MCQ (Single Correct Answer)
+2
-0.6
Assuming that the Op-amp in the circuit shown is ideal, V0 is given by GATE ECE 2014 Set 3 Analog Circuits - Operational Amplifier Question 29 English
A
$${5 \over 2}{V_1} - 3{V_2}$$
B
$$2{V_1} - {5 \over 2}{V_2}$$
C
$$ - {3 \over 2}{V_1} + {7 \over 2}{V_2}$$
D
$$ - 3{V_1} + {{11} \over 2}{V_2}$$
2
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown, the op-amp has finite input impedance, infinite voltage gain and zero input offset voltage. The output voltage Vout is GATE ECE 2014 Set 1 Analog Circuits - Operational Amplifier Question 30 English
A
$$ - {I_2}\left( {{R_1} + {R_2}} \right)$$
B
$${I_2}{R_2}$$
C
$${I_1}{R_2}$$
D
$$ - {I_1}\left( {{R_1} + {R_2}} \right)$$
3
GATE ECE 2014 Set 1
Numerical
+2
-0
In the voltage regulator circuit shown in the figure, the op - amp is ideal. The BJT has VBE = 0.7 V and $$\beta $$ = 100, and the Zener voltage is 4.7 V. For a regulated output of 9 V, the value of R (in $$\Omega $$) is ______ GATE ECE 2014 Set 1 Analog Circuits - Operational Amplifier Question 31 English
Your input ____
4
GATE ECE 2013
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown below the op-amps are ideal. Then Vout in Volts is GATE ECE 2013 Analog Circuits - Operational Amplifier Question 32 English
A
4
B
6
C
8
D
10
PREVIOUS NEXT
GATE ECE Subjects
Network Theory
State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous
Control Systems
Signal Flow Graph and Block Diagram Time Response Analysis Compensators Basic of Control Systems Frequency Response Analysis Stability Root Locus Diagram State Space Analysis
Electronic Devices and VLSI
Semiconductor Physics PN Junction BJT and FET IC Basics and MOSFET
Analog Circuits
Diodes Bipolar Junction Transistor Frequency Response FET and MOSFET Oscillators Operational Amplifier Feedback Amplifier Power Amplifier 555 Timer
Digital Circuits
Logic Gates Boolean Algebra Analog to Digital and Digital to Analog Converters Sequential Circuits Combinational Circuits Logic Families Number System and Code Convertions Semiconductor Memories
Microprocessors
Pin Details of 8085 and Interfacing with 8085 Instruction Set and Programming with 8085
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Fundamentals of Information Theory Noise In Digital Communication Analog Communication Systems Digital Communication Systems Random Signals and Noise
Electromagnetics
Waveguides Antennas Miscellaneous Transmission Lines Maxwell Equations Uniform Plane Waves
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Complex Variable Probability and Statistics Differential Equations Numerical Methods Transform Theory
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEEAP EAPCET
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12