ExamSIDE (Powered by ExamGOAL)
Questions
PREVIOUS NEXT
1
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown, the op-amp has finite input impedance, infinite voltage gain and zero input offset voltage. The output voltage Vout is GATE ECE 2014 Set 1 Analog Circuits - Operational Amplifier Question 30 English
A
$$ - {I_2}\left( {{R_1} + {R_2}} \right)$$
B
$${I_2}{R_2}$$
C
$${I_1}{R_2}$$
D
$$ - {I_1}\left( {{R_1} + {R_2}} \right)$$
2
GATE ECE 2014 Set 1
Numerical
+2
-0
In the voltage regulator circuit shown in the figure, the op - amp is ideal. The BJT has VBE = 0.7 V and $$\beta $$ = 100, and the Zener voltage is 4.7 V. For a regulated output of 9 V, the value of R (in $$\Omega $$) is ______ GATE ECE 2014 Set 1 Analog Circuits - Operational Amplifier Question 31 English
Your input ____
3
GATE ECE 2013
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown below the op-amps are ideal. Then Vout in Volts is GATE ECE 2013 Analog Circuits - Operational Amplifier Question 32 English
A
4
B
6
C
8
D
10
4
GATE ECE 2012
MCQ (Single Correct Answer)
+2
-0.6
The circuit shown is a GATE ECE 2012 Analog Circuits - Operational Amplifier Question 33 English
A
low pass filter with
$${f_3}dB = \,{1 \over {\left( {{R_1} + {R_2}} \right)C}}rad/s$$
B
high pass filter with
$${f_3}dB = \,{1 \over {{R_1}C}}rad/s$$
C
low pass filter with
$${f_3}dB = {1 \over {{R_1}C}}rad/s$$
D
high pass filter with
$${f_3}dB = {1 \over {\left( {{R_1} + {R_2}} \right)C}}rad/s$$
PREVIOUS NEXT
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Network Theory
Network Elements Network Theorems Transient Response Sinusoidal Steady State Response Two Port Networks Network Graphs State Equations For Networks Miscellaneous
Control Systems
Basic of Control Systems Signal Flow Graph and Block Diagram Time Response Analysis Stability Root Locus Diagram Frequency Response Analysis Compensators State Space Analysis
Digital Circuits
Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Electronic Devices and VLSI
PN Junction Semiconductor Physics IC Basics and MOSFET BJT and FET
Analog Circuits
Bipolar Junction Transistor FET and MOSFET Oscillators Operational Amplifier 555 Timer Frequency Response Diodes Feedback Amplifier Power Amplifier
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Probability and Statistics Differential Equations Complex Variable Numerical Methods Transform Theory
Microprocessors
Pin Details of 8085 and Interfacing with 8085 Instruction Set and Programming with 8085
Communications
Analog Communication Systems Digital Communication Systems Random Signals and Noise Fundamentals of Information Theory Noise In Digital Communication
Electromagnetics
Waveguides Antennas Miscellaneous Transmission Lines Maxwell Equations Uniform Plane Waves
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEEAP EAPCET
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12