GATE ECE 2008 | Logic Families Question 5 | Digital Circuits

GATE ECE 2008

MCQ (Single Correct Answer)

-0.6

The logic function implemented by the following circuit at the terminal OUT is GATE ECE 2008 Digital Circuits - Logic Families Question 3 English

GATE ECE 2008 Digital Circuits - Logic Families Question 3 English

P NOR Q

P NAND Q

P OR Q

P AND Q

GATE ECE 2007

MCQ (Single Correct Answer)

-0.6

The circuit diagram of a standard TTL NOT gate is shown in the figure. When $${V_i}$$= 2.5V, the modes of operation of the transistors will be: GATE ECE 2007 Digital Circuits - Logic Families Question 2 English

GATE ECE 2007 Digital Circuits - Logic Families Question 2 English

$${Q_1}$$ :reverse active

$${Q_2}$$; normal active

$${Q_3}$$; :saturation;

$${Q_4}$$ :cut-off

$${Q_1}$$ :reverse active

$${Q_2}$$: saturation

$${Q_3}$$: saturation

$${Q_4}$$ : cut-off

$${Q_1}$$ : normal active

$${Q_2}$$; cut-off

$${Q_3}$$; cut-off

$${Q_4}$$ : saturation

$${Q_1}$$ : :saturation

$${Q_2}$$: :saturation

$${Q_3}$$ :saturation

$${Q_4}$$ : normal active

GATE ECE 2003

MCQ (Single Correct Answer)

-0.6

The DTL, TTL, ECL and CMOS families of digital ICs are compared in the following 4 columns GATE ECE 2003 Digital Circuits - Logic Families Question 4 English

GATE ECE 2003 Digital Circuits - Logic Families Question 4 English

GATE ECE 1994

True or False

-0

In the output stage of a standard TTL, we have a diode between the emitter of the pull up transistor and the collector of the pull-down transistor. The purpose of this diode is to isolate the output node from the power supply $${V_{cc}}$$.

TRUE

FALSE

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GATE ECE Subjects

Signals and Systems

Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous

Network Theory

State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous

Control Systems

Basic of Control Systems Signal Flow Graph and Block Diagram Time Response Analysis Stability Root Locus Diagram Frequency Response Analysis Compensators State Space Analysis

Digital Circuits

Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters