1
GATE ECE 2013
MCQ (Single Correct Answer)
+2
-0.6
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If VCC is +5 V, X and Y are digital signals with 0 V as logic 0 and VCC as logic 1, then the Boolean expression for Z is GATE ECE 2013 Digital Circuits - Logic Families Question 11 English
A
XY
B
$$\overline XY$$
C
$$X\overline Y$$
D
$$\overline{XY}$$
2
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
The logic function implemented by the following circuit at the terminal OUT is GATE ECE 2008 Digital Circuits - Logic Families Question 3 English
A
P NOR Q
B
P NAND Q
C
P OR Q
D
P AND Q
3
GATE ECE 2007
MCQ (Single Correct Answer)
+2
-0.6
The circuit diagram of a standard TTL NOT gate is shown in the figure. When $${V_i}$$= 2.5V, the modes of operation of the transistors will be: GATE ECE 2007 Digital Circuits - Logic Families Question 2 English
A

$${Q_1}$$ :reverse active

$${Q_2}$$; normal active

$${Q_3}$$; :saturation;

$${Q_4}$$ :cut-off

B

$${Q_1}$$ :reverse active

$${Q_2}$$: saturation

$${Q_3}$$: saturation

$${Q_4}$$ : cut-off

C

$${Q_1}$$ : normal active

$${Q_2}$$; cut-off

$${Q_3}$$; cut-off

$${Q_4}$$ : saturation

D

$${Q_1}$$ : :saturation

$${Q_2}$$: :saturation

$${Q_3}$$ :saturation

$${Q_4}$$ : normal active

4
GATE ECE 2003
MCQ (Single Correct Answer)
+2
-0.6
The DTL, TTL, ECL and CMOS families of digital ICs are compared in the following 4 columns GATE ECE 2003 Digital Circuits - Logic Families Question 4 English
A
P
B
Q
C
R
D
S
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