1
GATE ECE 2017 Set 2
MCQ (Single Correct Answer)
+1
-0.3
In a DRAM,
2
GATE ECE 2015 Set 1
Numerical
+1
-0
A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number
of columns). The minimum number of address lines needed for the row decoder is _______.
Your input ____
3
GATE ECE 1996
MCQ (Single Correct Answer)
+1
-0.3
Each cell of a static Random Access Memory Contains
4
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of MOS transistors required to make a dynamic RAM cell is
GATE ECE Subjects
Browse all chapters by subject
Control Systems
Engineering Mathematics
Analog Circuits
Network Theory
Electromagnetics
Electronic Devices and VLSI
Digital Circuits
Microprocessors
Signals and Systems
Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Fourier Transform Representation of Continuous Time Signal Fourier Series Transmission of Signal Through Continuous Time LTI Systems Miscellaneous Sampling Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Discrete Time Signal Z Transform Transmission of Signal Through Discrete Time Lti Systems
Communications
General Aptitude