1
GATE ECE 2017 Set 2
MCQ (Single Correct Answer)
+1
-0.3
In a DRAM,
A
periodic refreshing is not required
B
information is stored in a capacitor
C
information is stored in a latch
D
both read and write operations can be performed simultaneously
2
GATE ECE 2015 Set 1
Numerical
+1
-0
A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum number of address lines needed for the row decoder is _______.
Your input ____
3
GATE ECE 1996
MCQ (Single Correct Answer)
+1
-0.3
Each cell of a static Random Access Memory Contains
A
6 MOS transistors.
B
4 MOS transistors and 2 capacitors
C
2 MOS transistors and 4 capacitors
D
1 MOS transistors and 1 capacitors
4
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of MOS transistors required to make a dynamic RAM cell is
A
1
B
2
C
3
D
4
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